AMD's latest Epycs are bristling with cores, stacked to the gills with cache
AMD has unveiled a pair of Epyc processors aimed at cloud and technical applications and detailed plans for its Instinct MI300 family of accelerators during its Datacenter and AI event in San Francisco.
, which have seen widespread adoption among cloud and hyperscalers since hitting the market in 2020. Today, every major cloud provider – with the exception of AWS, of course – has deployed Ampere's chips. AMD's Bergamo Epyc processors feature 128 cores and 256 threads spread across eight core-complex dies
However, in containerized scale-out workloads SMT could pay dividends, where more threads should theoretically allow AMD to achieve greater densities. Three times higher densities in containerized workloads, according to AMD's internal benchmarks. One notable advantage AMD has over Ampere, at least for now, is broad support for the x86 instruction set. Customers used to running workloads on Intel and AMD systems won't need to refactor their applications to take advantage of the greater core density – something that isn't necessarily true whenBergamo won't be unique in this particular facet for much longer. Intel has promised a core-optimized Xeon, with even more cores for early 2024.
As the name suggests, the chip is based on the company's standard Genoa platform, but features AMD's 3D V-Cache tech, which boosts the available L3 cache by vertically stacking SRAM modules on each of the CCDs.
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